The FPCL Developer Environment

A developer environment used to develop applications using the FPCL has to represent a Processor for the logic, and an object for a register. Cellot software entry levels can be of different styles:

·        C++

·        Proprietary CSL (Cellot Simulation Language)

·        Scripts style the formula being used in Microsoft Excel

·        Schematic Capture Visual interface oriented to both Software and Hardware

·        Verilog for developers that prefer the old-fashioned style

·        Any combination of the above

The Developer Environment has been developed in Visual C++.

The FPCL Development Environment has the ability to create FPCL objects, the basis for an FPCL application, by editing or in runtime. These objects are integrated into all of the languages mentioned above. The developer environment enables the engineer to:

·        Create, manipulate and use the FPCL components

·        Generate any signal

·        Manipulate results (e.g. see graphic results in logarithmic view)

·        Add commands to the FPCL Compiler

·        Manipulate the Developer Environment itself

The simulation results can be presented in tables or in graphic views. These results can be presented as

·        Digital (Logic Analyzer style or bus style)

·        "Analog" i.e. converting the bit result to its value by using integers, unsigned integers, float, PCM or any user function needed.

·        Bar style

and more.

The Developer Environment is capable of combining development with any type needed and not only bits (e.g. integer, float, string). In practice the needed target (the higher design level) would be implemented in non-bit types (float, integer, string, etc.). When bit results are being used they can be converted into the other types enabling a very accurate comparison with the higher design level. The comparison can be made visually or logically to achieve the needed target.

To see a demonstration of the FPCL Developer Environment please follow the following link to the Publications page: Developer Environment Demonstration

To see a basic demonstration of the integer / logic style result of a counter click the following link: Counter Timing Diagram

To see an analog result of a filter and a visual comparison between float calculated result and bits implementation click the following link Filter Result